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notes [2011/02/09 15:43] (current)
choijon5 created
Line 1: Line 1:
 +-fixed vJTAGUart_hw.tcl to clear SOPC warnings
 +-Another bug is data_cache.v in addition to cacheclken = 1 
 +
 +It writes when it's not supposed to. Fixed it by doing:
 +
 +reg memWrite_reg;​
 +always @(posedge clk)
 +begin
 + memWrite_reg <= memWrite;
 +end
 +
 + assign cacheWrite = fetchDone || (state == stateWRITE && cacheHit && memWrite_reg) || state == stateFLUSH;
 +
 +
 +-fixed onchip_mem.v to clear modelsim warnings (onchip_mem.v.copy gets copied to onchip_mem.v)
 +
  
notes.txt ยท Last modified: 2011/02/09 15:43 by choijon5