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October 27, 2009

  • Hannah Bian - A former U of T grad student. Sped up VPR by 100x using Analytical Placement.
  • Bus-based LUTs: share configuration bits
  • Ian Kuon wrote an interesting paper on the gap between ASICs and FPGAs
  • Floating point multiplication isn't very expensive on an FPGA: uses DSPs. But FP adders are very expensive
    • Altera FP multi runs at 300Mhz
  • Fixed Point vs Floating Point
    • 16 slices vs 701 slices
  • SystemVerilog
    • has floating point types
    • Xilinx doesn't support? (confirm) Altera does.
    • supports interfaces
    • always(ff) construct - simpler for students
  • Actel IGLOO FPGA - low power (5 µW), targeting cell phones
fpgarg_notes.txt · Last modified: 2010/12/15 15:53 (external edit)