eXCite version: 4.1p (p1)
eXCite is a commercial HLS tool, developed by a company called Y explorations (spawned from UC Irvine) [website: http://www.yxi.com/]. The tool is known to work for all of the CHStone benchmarks, and results are discussed in the CHStone paper [accessible from: http://www.ertl.jp/chstone/].
eXCite / Cyclone II Implementation Results (July 5, 2010, updated: July 6, 2010, updated: July 7, 2010, updated: July 26, 2010)
Notes:
- Results for the four “df” circuits are included, however, the circuits are not functionally correct. UPDATE: 2 of the 4 “df” circuits are now working – input/golden vectors were improperly synthesized by eXCite, fixed manually; problem in 64 bit comparison in eXCite synthesis results, fixed manually. UPDATE (July 26: all CHStone circuits are working correctly now after fixes in incorrect Verilog produced by eXCite.
- Mapping doing using Quartus 9.1 SP 2
- For the “mips” benchmark, there are three versions: 1) default options of eXCite (“mips”), 2) resource-limited allocation in eXCite (“mips_slow”), 3) best-performance option in excite (“mips_fast”)
- Cyclone II speed grade for all implementations: -6
| CIRCUIT | # LEs | # registers | # mem bits | # mults | Frequency (MHz) | Cycles | Notes |
| adpcm | 12280 | 4585 | 6572 | 28 | 24.92 | 21992 | |
| aes | 22594 | 3332 | 18688 | 0 | 38.12 | 55679 | |
| blowfish | 18559 | 1674 | 33944 | 0 | 33.73 | 209614 | |
| dfadd | 4437 | 1138 | 0 | 0 | 21.81 | 370 | 0 errors |
| dfdiv | 5206 | 1260 | 0 | 32 | 38.33 | 2029 | 0 errors |
| dfmul | 3148 | 553 | 0 | 32 | 45.93 | 223 | 0 errors |
| dfsin | 17040 | 4086 | 0 | 38 | 31.66 | 49709 | 0 errors |
| gsm | 5275 | 1358 | 3280 | 2 | 31.5 | 5739 | |
| jpeg | 30420 | 4205 | 105278 | 20 | 22.66 | 3248488 | |
| mips | 1957 | 436 | 3072 | 8 | 64.1 | 4344 | |
| mips_fast | 2012 | 435 | 3072 | 8 | 88.99 | 4344 | |
| mips_slow | 2144 | 735 | 4352 | 8 | 55.87 | 21460 | |
| motion | 7209 | 1118 | 16384 | 0 | 42.35 | 2268 | |
| sha | 12089 | 1320 | 3072 | 0 | 55.82 | 238009 |
Power results
IMPORTANT NOTE: All simulations were at 10 MHz, EXCEPT for AES which was at 25 MHz. http://www.eecg.utoronto.ca/~janders/eXCite_power/
The results for the “new” Quartus settings are at: http://www.eecg.utoronto.ca/~janders/eXCite_new_flow – note that we must use the old data for the jpeg benchmark, as it does not fit into the largest Cyclone II with the new settings. With the new settings, all circuits were simulated at 10 MHz (including AES).
