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adding_fpga_board_support [2014/07/07 17:30]
joychen created - needs editing
adding_fpga_board_support [2014/07/25 14:06]
joychen
Line 5: Line 5:
     * perl hwtest.pl <Device Family> <Device Name>     * perl hwtest.pl <Device Family> <Device Name>
     * i.e. "perl hwtest.pl CycloneV 5CSEMA5F31C6"​     * i.e. "perl hwtest.pl CycloneV 5CSEMA5F31C6"​
-  * Move legup/​hwtest/<​Device Family>/​profile.tcl to legup/hwtest/<Device Family>​.tcl+  * Move legup/​hwtest/<​Device Family>/​profile.tcl to legup/boards/<​Device Family>/<Device Family>​.tcl 
 + 
 +  Special Note on multiplier characterization:​ 
 +  Characterization is always performed by inserting input and output registers 
 +  around the operation to be analyzed. The multiplier implemented on the DSP 
 +  is special in that depending on the quartus version and DSP block, these 
 +  input/​output registers which are used to separate the datapath from possible 
 +  I/O delay from routing to pins may be placed onto the DSP block itself. 
 +  Therefore, with this technique, we cannot obtain the correct information for 
 +  DSP multipliers of latency 0.
  
 2) Update Configuration Files 2) Update Configuration Files
Line 17: Line 26:
   * create legup/​examples/<​FPGA_BOARD>​.tcl   * create legup/​examples/<​FPGA_BOARD>​.tcl
  
-3) Test for optimal clock period constraint+3) Test for optimal clock period constraint ​by changing CLOCK_PERIOD parameter in legup.tcl 
 +  * [[CycloneV Data]] 
 +  * [[StratixV Data]]
  
 4) Processor Directories 4) Processor Directories
adding_fpga_board_support.txt · Last modified: 2014/07/25 14:06 by joychen